iTOE
TCP Offloading Engine (TOE) enables TCP transfer with full band-width Gigabit Ethernet. Having TCP/IP full stack implemented in FPGA, high-speed TCP transfer as well as universal LAN communication (TCP/UDP) achieved with FPGA single chip. Complex tasks of TCP/IP protocol control are all processed with FPGA, substantially offloading the burden from host processor. With major functions required for PCI Express® and Gbit Ethernet design configuration come as a platform, Giga bit Ethernet TCP/IP Solution will help expedite time-to-market.
- Key Features
- TCP Offloading Engine + TCP Stack
- Target Markets
Device Family Support
- Virtex-6 LXT
- Virtex-6 SXT
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
- Spartan-6 LX
- Spartan-6 LXT
Device Implementation Matrix
Device utilization metrics for example implementations of this core. Contact provider for more information.
| Family |
Device |
Speed Grade |
Tool | Version |
HW Validated? |
Slice |
LUT |
BRAM |
DSP48 |
CMT |
GTx |
Fmax (Mhz) |
| Spartan 6T Family |
XC6SLX45T |
-2 |
ISE 14.3,
ISE 14.3 |
Y |
2588 |
5513 |
73 |
0 |
0 |
0 |
125 |
IP Quality Metrics Table
| Deliverables |
| IP Formats available for purchase |
Netlist |
| Source Code Formats(s) |
Verilog |
| High-Level Model Included? |
N |
| Integration Testbench Provided |
Y |
| Integration Techbench Format(s) |
Verilog |
| Code Coverage Report Provided? |
Y |
| Functional Coverage Report Provided? |
Y |
| UCFs Provided? |
Y |
| Commercial Evaluation Board Available? |
N |
| FPGA used on board |
N/A |
| Software Drivers Provided? |
Y |
| Driver OS Support |
iTRON |
| Implementation |
| Code Optimized for AMD? |
Y |
| Custom FPGA Optimization Techniques |
None |
| Synthesis Software Tools Supported / version |
AMD XST |
| Static Timing Analysis Performed? |
Y |
| Standard IP Interface(s) Supported |
AXI-4 |
| IP-XACT Metadata Included? |
N |
| Verfification |
| Is a documented verification plan available? |
Yes, document only plan |
| Test Methodology |
Directed Testing |
| Assertions |
Y |
| Coverage Metrics Collected |
Functional |
| Timing Verification Performed? |
Y |
| Timing Verification Report Available |
Y |
| Simulators supported |
Mentor ModelSIM |
| Hardware Validation |
| Validated on FPGA |
N |
| Industry standard compliance testing passed |
N |
| Are test results available? |
N |
Document download
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